	.global arm_undefined
arm_undefined:
	b	.

	.global arm_syscall
arm_syscall:
	b	.
	
	.global arm_prefetch_abort
arm_prefetch_abort:
	b	.

	.global arm_data_abort
arm_data_abort:
	b	.
	
	.global arm_reserved
arm_reserved:
	b	.
	
	.global arm_irq
arm_irq:
	/* XXX only deals with interrupting supervisor mode */

	/* save irq_lr and irq_spsr into a temporary place while we switch into supervisor mode */
	sub	lr, lr, #4
	str	lr, irq_save_lr
	mrs	r14, spsr
	str	r14, irq_save_spsr
	
	/* move into supervisor mode. irq/fiq disabled */
	msr	cpsr_c, #(3<<6 | 0x13)

	/* save r4, we need the temporary register */
	str	r4, irq_save_r4

	/* save the return address */
	ldr	r4, irq_save_lr
	stmfd	sp!, { r4 }

	/* restore r4 */
	ldr	r4, irq_save_r4

	/* save C trashed regs, supervisor lr */
	stmfd	sp!, { r0-r3, r12, lr }

	/* save spsr */
	ldr	r0, irq_save_spsr
	stmfd	sp!, { r0 }
	
	/* call into higher level code */
	mov	r0, sp /* iframe */
	bl	platform_irq

	/* restore spsr */
	ldmfd	sp!, { r0 }
	msr	spsr, r0

	/* restore back to where we came from */
	ldmfd	sp!, { r0-r3, r12, lr, pc }^

irq_save_lr:
	.word	0
irq_save_spsr:
	.word	0
irq_save_r4:
	.word	0
	
	.global arm_fiq
arm_fiq:
	sub	lr, lr, #4
	stmfd	sp!, { r0-r3, r12, lr }

	bl	platform_fiq
	
	ldmfd	sp!, { r0-r3, r12, pc }^

.ltorg
